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| FDS4435A Septmeber 1999 FDS4435A P-Channel Logic Level PowerTrenchTM MOSFET General Description This P-Channel Logic Level MOSFET is produced using Fairchild Semiconductors advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for notebook computer applications: load switching and power management, battery charging circuits, and DC/DC conversion. Features -9 A, -30 V. RDS(ON) = 0.0175 @ VGS = -10 V RDS(ON) = 0.0250 @ VGS = -4.5 V Low gate charge (21nC typical). High performance trench technology for extremely low RDS(ON). High power and current handling capability. D D D D 5 6 4 3 2 1 SO-8 S S S G 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA = 25C unless otherwise noted Parameter Ratings -30 (Note 1a) Units V V A W 20 -9 -50 2.5 1.2 1 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) TJ, Tstg Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 50 25 C/W C/W Package Marking and Ordering Information Device Marking FDS4435A Device FDS4435A Reel Size 13'' Tape Width 12mm Quantity 2500 units 1999 Fairchild Semiconductor Corporation FDS4435A Rev. C FDS4435A Electrical Characteristics Symbol Off Characteristics BVDSS BVDSS TJ IDSS IGSSF IGSSR TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse (Note 2) Test Conditions VGS = 0 V, ID = -250 A ID = -250 A,Referenced to 25C VDS = -24 V, VGS = 0 TJ = 125C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V Min -30 Typ Max Units V -26 -1 -10 100 -100 mV/C A nA nA On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance VDS = VGS, ID = -250 A ID = -250 A,Referenced to 25C VGS = -10 V, ID = -9 A TJ = 125C VGS = -4.5 V, ID = -7 A -1 -1.7 4.2 0.015 0.021 0.023 -3 V mV/C 0.0185 0.030 0.025 ID(on) gFS On-State Drain Current Forward Transconductance VGS = -10 V, VDS = -5 V VDS = -10 V, ID = -9 A -40 25 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = -15 V, VGS = 0 V f = 1.0 MHz 2010 590 260 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -15 V, ID = -1 A VGS = -10 V, RGEN = 6 12 15 100 55 22 27 140 80 30 ns ns ns ns nC nC nC VDS = -15 V, ID = -9 A VGS = -5 V, 21 6 8 Drain-Source Diode Characteristics and Maximum Ratings IS VSD trr Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Source-Drain Reverse Recovery Time VGS = 0 V, IS = -2.1 A (Note 2) -2.1 0.75 36 -1.2 80 A V ns IF = -10 A, dlF/dt = 100 A/S Notes: 1: RJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RJA is determined by the user's board design. a) 50 C/W when mounted on a 1 in2 pad of 2 oz. copper. b) 105 C/W when mounted on a 0.04 in2 pad of 2 oz. copper. c) 125 C/W when mounted on a 0.006 in2 pad of 2 oz. copper. Scale 1 : 1 on letter size paper 2: Pulse Test: Pulse Width 300 s, Duty Cycle 2.0% FDS4435A Rev. C FDS4435A Typical Characteristics 50 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.4 VGS = -10V -6.0V -ID, DRAIN CURRENT (A) 40 -5.0V -4.5V -4.0V 2.2 2 1.8 1.6 1.4 1.2 1 0.8 VGS = -3.5V -4.0V -4.5V -5.0V -6.0V -7.0V -8.0V -10V 30 -3.5V 20 10 -3V 0 0 1 2 3 4 5 -VDS, DRAIN-SOURCE VOLTAGE (V) 0 10 20 30 40 50 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage 0.07 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = -8.8A VGS = -10V ID = -4.4A 0.06 0.05 0.04 0.03 0.02 0.01 0 o 1.4 1.2 1 TA = 125 C TA = 25oC 0.8 0.6 -50 -25 0 25 50 75 100 o 125 150 2 4 6 8 10 TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature 50 VDS = -5V -ID, DRAIN CURRENT (A) 40 TA = -55 C 25 C 125 C 30 o o o Figure 4. On-Resistance Variation with Gate-to-Source Voltage 100 -IS, REVERSE DRAIN CURRENT (A) VGS = 0V 10 1 0.1 -55oC 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) TA = 125oC 25oC 20 10 0 1 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature FDS4435A Rev. C FDS4435A Typical Characteristics 10 -VGS, GATE-SOURCE VOLTAGE (V) ID = -8.8A 8 (continued) 2500 VDS = -5V -10V -15V CAPACITANCE (pF) 2000 CISS f = 1 MHz VGS = 0 V 6 1500 4 1000 2 500 COSS CRSS 0 0 5 10 15 20 25 30 35 Qg, GATE CHARGE (nC) 0 0 5 10 15 20 25 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate-Charge Characteristics 50 RDS(ON) LIMIT -ID, DRAIN CURRENT (A) 10 100s 1ms 10ms 100ms 1 DC VGS = -10V SINGLE PULSE o RJA = 125 C/W TA = 25 C 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) o Figure 8. Capacitance Characteristics 100 40 POWER (W) SINGLE PULSE RJA =125C/W TA = 25C 30 1s 10s 20 0.1 10 0 0.001 0.01 0.1 1 10 SINGLE PULSE TIME (SEC) 100 300 Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation TR ANSI ENT T ER M H AL RESISTANC E 1 0.5 0.2 0.1 0 .05 0 .02 0 .01 0. 05 0 0. 02 0 0. 01 0 0.0 001 0. 01 0 0 .01 0.1 t 1, TI M E (s e c ) 1 10 100 300 D= 0 .5 0 .2 0 .1 005 . 0. 2 0 0 .01 S i n g le P ul s e r(t), NORM AL IZED EFFECTIVE R J A (t) = r(t) * R J A R J A= 125C /W P(pk ) t1 t2 TJ - TA = P * RJ ( t A) D u t y C y c l e, D = t 1 /t2 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design. FDS4435A Rev. C SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1.0 Packaging Description: EL ECT ROST AT IC SEN SIT IVE DEVICES DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms Antistatic Cover Tape ESD Label SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. Static Dissipative Embossed Carrier Tape F63TNR Label Customized Label F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182 F852 NDS 9959 Pin 1 SOIC-8 Unit Orientation 343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC: F63TNLabel F63TN Label ESD Label (F63TNR)3 D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0 T E1 P0 D0 F K0 Wc B0 E2 W Tc A0 P1 D1 User Direction of Feed Dimensions are in millimeter Pkg type SOIC(8lds) (12mm) A0 6.50 +/-0.10 B0 5.30 +/-0.10 W 12.0 +/-0.3 D0 1.55 +/-0.05 D1 1.60 +/-0.10 E1 1.75 +/-0.10 E2 10.25 min F 5.50 +/-0.05 P1 8.0 +/-0.1 P0 4.0 +/-0.1 K0 2.1 +/-0.10 T 0.450 +/0.150 Wc 9.2 +/-0.3 Tc 0.06 +/-0.02 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). 20 deg maximum Typical component cavity center line 0.5mm maximum B0 20 deg maximum component rotation 0.5mm maximum Sketch A (Side or Front Sectional View) Component Rotation A0 Sketch B (Top View) Typical component center line Sketch C (Top View) Component lateral movement SOIC(8lds) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max Dim N See detail AA 7" Diameter Option B Min Dim C See detail AA W3 Dim D min 13" Diameter Option W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size 12mm Reel Option 7" Dia Dim A 7.00 177.8 13.00 330 Dim B 0.059 1.5 0.059 1.5 Dim C 512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2 Dim D 0.795 20.2 0.795 20.2 Dim N 2.165 55 7.00 178 Dim W1 0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0 Dim W2 0.724 18.4 0.724 18.4 Dim W3 (LSL-USL) 0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4 12mm 13" Dia (c) 1998 Fairchild Semiconductor Corporation July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 9 September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM DISCLAIMER ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 TinyLogicTM UHCTM VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. |
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